Data processing medium, its backup circuit, and data processing system

ABSTRACT

There is disclosed a backup circuit for a memory card where the stored data in an S-RAM is retained even when the card (2) contains a main battery (18) whose output voltage is 3.3 V, an auxiliary battery (20), and a charging prevention diode (22). The main battery (18) and the auxiliary battery (20) are connected in parallel. Between their junction (28) and a built-in power supply (8) of a personal computer (4), the charging prevention diode (22) is provided. Because the second diode (22) is placed in a forward direction running from the junction (28) toward a voltage supply line (10), the auxiliary battery (20) is charged only from the main battery (18), and a charging current from the built-in power supply (8) does not flow into the auxiliary battery (20).

FIELD OF THE INVENTION

This invention relates generally to a data processing medium. Moreparticularly, this invention relates to a circuit for backing up thesemiconductor element of a data processing medium in replacing thebattery for the data processing medium, and to a data processing mediumwith the backup circuit. Additionally, this invention relates to a dataprocessing system containing the data processing medium and a dataprocessing unit.

BACKGROUND OF THE INVENTION

In general, a data processing medium such as a memory card is suppliedwith a driving voltage from a data processing unit (typically, apersonal computer and its peripheral equipment) in which the medium isto be installed. When the supply of the voltage to a memory card using astatic random access memory (hereinafter, abbreviated as an S-RAM) asthe data storage element is cut off, the stored data will be lost.

Accordingly, to back up the stored data in the S-RAM of a memory card,various backup circuits and circuit systems have been proposed.

As one known example, there is a circuit in which the voltage supplyline of a memory card is connected to a parallel combination of the mainbattery acting as a first backup means, an auxiliary battery acting as asecond backup means (a large capacitor), and an S-RAM. In this circuit,while the memory card is being removed from the data processing unit,the main battery supplies a voltage to the S-RAM to retain the storeddata in the S-RAM. When the main battery is replaced, the largecapacitor supplies a voltage for retaining the stored data in the S-RAM.

Generally, when data is read from the S-RAM, a higher voltage than thatof the main battery is supplied from an external power supply (a powersupply build in the data processing unit) to the S-RAM through thevoltage supply line. In the case of a circuit using a conventional largecapacitor, the voltage from the external power supply is also suppliedto the large capacitor. This permits a charging current to flow into thelarge capacitor at the same time that an operating current flows intothe S-RAM.

The charging current to the large capacitor is a wasteful load to theexternal power supply. The large capacitor is required to have a highwithstand voltage so as to withstand the voltage from the externalpower-supply line. Therefore, it is necessary to use a relativelyexpensive large capacitor for the conventional circuit.

As another known example, there is a circuit system in which the currentline of the power supply for an IC card is connected to a parallelcombination of the main battery acting as a first backup means, arechargeable auxiliary battery (a lithium battery) acting as a secondbackup means, and an S-RAM, with a diode and a constant-voltage circuitconnected between the power supply and the lithium battery. In thiscircuit system, the lithium battery backs up the S-RAM when the mainbattery is replaced.

In the conventional circuit system, however, the lithium battery ischarged only when a high voltage for operating the S-RAM, for example, a+5 voltage is applied from the power supply. Therefore, before thereplacement of the main battery, the lithium battery must be chargedfrom the power supply. Furthermore, because the conventional circuitsystem contains a constant-voltage source, its design and arrangementare complex.

Additionally, in the conventional circuit or circuit system, each timethat the power supply applies a voltage to the S-RAM, the auxiliarybattery (the large capacitor or lithium battery) is also charged.However, since the number of charges and discharges is limited for thelarge capacitor or lithium battery, frequent charging and dischargingdegrades its characteristics.

SUMMARY OF THE INVENTION

A general object of the present invention is to solve problems peculiarto the above-described conventional circuit and circuit system.Specifically, the object of the invention is to provide a dataprocessing medium, its backup circuit, and a data processing systemwhich prevent a charging current from flowing from an external powersupply into a second backup means, allow use of a second backup meanswith low withstand voltage characteristics, require no charging of thesecond backup means before the replacement of a first backup means, andare able to reduce the number of charges and discharges of the secondbackup means.

According to one aspect of the present invention, there is provided adata processing medium containing a semiconductor element which can atleast store data. This data processing medium comprises: a voltage inputterminal which can be connected to an external power supply and fromwhich a voltage supply line is extended to supply a voltage from theexternal power supply so as to operate a semiconductor element; firstdetachable backup means which has a positive and a negative electrode,the positive electrode being connected to the semiconductor element viathe voltage supply line, and which backs up the stored data in thesemiconductor element during the time when the external power supply isdisconnected from the voltage input terminal; second backup means whichhas a positive and a negative electrode, the positive electrode beingelectrically connected in parallel to the positive electrode of thefirst backup means so as to be charged from the first backup means, andwhich backs up the stored data in the semiconductor element during thetime when the external power supply is disconnected from the voltageinput terminal and the first backup means is detached; and chargingprevention means provided between the junction of the positive electrodeof the first backup means and the positive electrode of the secondbackup means and the external power supply so that the second backupmeans may not be charged from the external power supply.

The data processing medium may be an integrated circuit card or a memorycard. According to the embodiment of the invention, the semiconductorelement may be a static random access memory.

The second backup means may be a capacitor or a rechargeable battery.

According to another aspect of the invention, there is provided acircuit for backing up the stored data in a semiconductor element in adata processing medium comprising a semiconductor element which can atlease store data and a voltage input terminal which can be connected toan external power supply and from which a voltage supply line isextended to supply a voltage from the external power supply so as tooperate the semiconductor element.

According still another aspect of the invention, there is provided adata processing system comprising a data processing medium containing asemiconductor element which can at least store data and a dataprocessing unit to which the data processing medium is to be connected,data exchange being effected between the data processing medium and thedata processing unit.

According to the invention, because the positive electrodes of the firstand second backup means are connected in parallel, the second backupmeans is constantly charged from the first backup means.

Because the charging prevention means is provided between the junctionof the first backup means and the second backup means and the externalpower supply, the second backup means is not charged from the externalpower supply.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit block diagram of a data processing system accordingto a first embodiment of the present invention

FIG. 2 is a circuit block diagram of a second embodiment of theinvention

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

With reference to FIG. 1, in a data processing system of the presentinvention, data processing medium generally indicated by referencesymbol 2 is a memory card to be installed in a data processing unit(e.g., a personal computer and its peripheral equipment) 4 fortransmitting and receiving to and from the medium.

The memory card 2 is installed detachably in the data processing unit 4via, for example, a connector 4a provided in the data processing unit 4.The connector 4a is electrically connected to a datatransmission/reception system (not shown) of the data processing unit 4.It is desirable that the connector 4a should be a detachable type to thedata processing unit 4. For example, the connector disclosed in JapaneseUtility Model Application No. 2-90772 (the corresponding U.S. Pat. No.5,152,697) can be used.

This invention relates chiefly to backing up the stored data in thememory card 2, so that a detailed explanation of the data transmissionand reception system between the memory card 2 and the data processingunit 4 and of the connector 4a will be omitted. In FIG. 1, thedimensions of the memory card 2 are drawn exaggeratedly with respect tothe general data processing unit 4.

FIG. 1 shows a state where the memory card 2 is installed properly inthe data processing unit 4 via the connector 4a. In this state, thevoltage input terminal 6 of the memory card 2 can be connected to anexternal power supply (a power supply built in the data processing unit4) via the connector 4a. The external power supply 8 typically suppliesa +5-V voltage to the input terminal 6 of the memory card 2. The voltagesupply line 10 extended from the input terminal 6 of the memory card 2is provided with a first diode 12 for preventing the battery currentfrom flowing backward to the external power supply 8. The purpose ofplacing the diode 12 is to prevent the battery (explained later) in thecard 2 from being consumed faster due to the backward flow of currentfrom the battery (explained later 0 in the card 2 to the unit 4, becausethe voltage of the external power supply 8 drops to zero when thedriving power supply of the data processing unit 4 is turned off whilethe memory card 2 remains in contact with the data processing unit 4.

The voltage supply line 10 in the downstream of the first diode 12 isconnected to a parallel combination of a semiconductor element 14 andits backup circuit 16.

The semiconductor element 14 in the embodiment is a static random accessmemory (hereinafter, referred to as an S-RAM). The power consumption ofthe S-RAM 14 is 5 v at the time of reading and writing. When the voltageinput terminal 6 of the memory card 2 is not connected to the externalpower supply 8, that is, when the memory card 2 is not connected to thedata processing unit 4, the power consumption of the S-RAM 14 isrequired to be 2 V or more in order to back up the stored data. Theordinary S-RAM 14 can be backed up at voltages ranging from 2 V to 5.5V.

The backup circuit 16 contains a main battery 18, an auxiliary battery20, and a second diode 22.

The main battery 18 is a commercially available coin-type lithiumbattery of the CR2025 type, whose nominal output voltage is 3 V(actually, 3.3 V). For the auxiliary battery 20, a rechargeable batteryor a capacitor may be used. In the present embodiment, a 0.1-Fpolyacelene capacitor is used.

The positive electrode of the main battery 18 and that of the auxiliarybattery 20 are connected in parallel directly or via a resistor 24. Whenthe resistor 24 is used, the resistance is preferably 1 KΩ or less. Thereason for this will be explained later.

The second diode 22 is provided in a line 26 running from the voltagesupply line 10 to the junction 28 of the main battery 18 and theauxiliary battery 20. Since the second diode 22 is placed in a forwarddirection running from the junction 28 toward the voltage supply line10, the auxiliary battery 20 is charged only from the main battery 18,thereby preventing a charging current from flowing into the auxiliarybattery 20 from the external battery 8.

Therefore, the withstand voltage of the auxiliary battery 20 has only tobe nearly the maximum output voltage (in the embodiment, 3.3 V) of themain battery 18. It is not necessary to take into account the withstandvoltage of the auxiliary battery 20 with respect to the output voltage(in the embodiment, 5 V) of the external battery 8. The second diode 22is placed to prevent the main battery 18 from being charged. In thepresent embodiment, placing the diode 22 enables the number of chargesand discharges of the auxiliary battery 20 to be reduced, therebyextending the service life of the auxiliary battery 20 and also enablinguse of a low withstand voltage auxiliary battery 20.

The negative electrodes of the semiconductor element 14, main battery18, and auxiliary battery 20 are each connected to a ground line 30.

The reason why it is desirable that the resistance of the resistor 24should be 1 kΩ or less will be described below.

The resistance of the resistor 24 is 1 kΩ. With the auxiliary battery 20fully discharged (consequently the output voltage is 0 V), when a newmain battery 18 whose output voltage is 3.3 V is installed, a maximumcurrent of 3.3 mA (=3.3 V/1 KΩ) will flow in the transition period atthe beginning of charging. A current on this order is not a heavy loadto the new main battery 18. At this time, a drop in the output voltageof the main battery 18 is approximately 0.2 v. The drop in the outputvoltage was measured with a 1-KΩ constant resistance load beingconnected to a coin-type lithium battery of the CR2025 type.

As the auxiliary 20 is charged more, the charging current reducesaccordingly, with the result that the output voltage of the main battery18 rises and restores the original condition. Therefore, even if theresistance is reduced, only momentary voltage drop will take place.Because the output voltage of the main battery 18 restores the originalcondition as the charging of the auxiliary battery 20 makes progress,there arises no serious function problem.

The commercially available coin-type lithium battery of the CR2025 typehas a maximum discharging current of approximately 6 mA continuous and50 mA in pulse form. When the lowest resistance of the resistor 24 isobtained from the current (50 mA) of the pulse load, it will give 600 Ω(=3 V/50 mA).

Because it is hard for current to flow into the auxiliary battery 20when the resistance of the resistor 24 is too large, it takes time tocharge the auxiliary battery 20. In replacing the main battery 18,because the backup current is also supplied to the S-RAM 14 via theresistor when the S-RAM 14 is backed up only by the auxiliary battery20, the backup voltage of the S-RAM 14 will drop. For example, with theresistance of the resistor 24 being 10 KΩ, when a 10-μ A backup currentflows, a 0.1-V voltage drop will take place due to the resistor 24.Since the output voltage of the main battery 18 is naturally low at thetime of replacement of the main battery 18, the potential of theauxiliary battery 20 connected in parallel to the main battery 18 isalso at the same level. Therefore, it is desirable that the outputvoltage of the auxiliary battery 20 should be used effectively at thetime of replacement of the main battery 18 by minimizing a voltage dropdue to the resistor 24. Accordingly, the lower the resistance of theresistor 24, the better. If the resistance of the resistor 24 is 1 kΩ, avoltage drop due to a backup current of 10 μ A is 10 mV, which is almostnegligible.

Another purpose of placing the resistor 24 is to protect the mainbattery 18 if the auxiliary battery 20 should break down and beshort-circuited. If the resistor 24 is not provided, an excessivecurrent will flow from the main battery 18 in case the auxiliary battery20 breaks down and goes short-circuited, permitting the main battery 18to generate heat. In the worst case, the main battery 18 can explode. Byplacing he resistor 24, however, current in the main battery 18 can belimited to prevent the main battery 18 from generating heat andexploding.

The procedure for replacing the main battery 18 of the memory card 2 andthe operation of the backup circuit will be described as follows.

(i) First, the memory card 2 is removed from the data processing unit 4.This disconnects the built-in power supply 8 of the data processing unit4 from the memory card 2. In this case, because the main battery 18supplies a 3-V voltage to the S-RAM 14, the stored data in the S-RAM 14is retained.

(ii) Then, to replace the main battery 18, the main battery 18 isremoved from the memory card 2. In this case, because the auxiliarybattery 20 supplies a voltage to the S-RAM 14, the stored data in theS-RAM 14 is retained. Since the main battery 18 charges the auxiliarybattery 20 even if the memory card 2 is removed from the data processingunit 4, it is not necessary to charge the auxiliary battery 20 each timethe main battery 18 is replaced. In the present embodiment, even if themain battery 18 is removed from the memory card 2, the stored data inthe S-RAM 14 is retained for nearly 10 minutes by the auxiliary battery20.

(iii) By providing a new main battery 18 on the memory card 2, a voltageis supplied again from the main battery 18 to the S-RAM 14.

(iv) The memory card 2 whose main battery 18 is replaced with a new oneis installed in the data processing unit 4.

As described above, even in the course of replacing the main battery 18,the stored data in the S-RAM 14 is retained and the output voltage ofthe external power supply 8 is not applied to the auxiliary battery 20.

Furthermore, the circuit configuration is simple. As compared with aconventional backup circuit, the number of component parts is notincreased much. Because in a conventional backup circuit, a lithiumbattery or the like which cannot (must not) be charged as the mainbattery cannot is generally used, a diode never fails to be added in acircuit using such a main battery, regardless of whether the auxiliarybattery 20 is present or not. Therefore, the number of component partsdoes not increase in the conventional backup circuit as a result fromadding a second diode 22, as in the present invention.

FIG. 2 shows a second embodiment of the present invention. The secondembodiment differs from the first embodiment in that the former isprovided with means for letting the operator know a drop in the outputvoltage of the main battery 18 of the memory card 2.

In FIG. 2, the backup circuit 16 of the memory card 2 contains acomparator 32 differently from the first embodiment. The comparator 32in the present embodiment is a comparator 32 containing a referencevoltage generating circuit. The comparator 32 has an input terminal, towhich the output voltage (normally 3 V) of the main battery 18 issupplied as an input voltage. The reference voltage generating circuitbuilt in the comparator 32 generates a reference voltage (normally 2.3V) to be compared with the output voltage of the main battery 18. Thecomparator 32 outputs an alarm signal (digital signal) when the inputvoltage drops below the reference voltage. The alarm signal is inputtedto a control circuit 34 of the data processing unit 4. The controlcircuit 34, on the basis of the alarm signal, displays a message thatthe main battery 18 is consumed, on a display 36 provided for the dataprocessing unit 4.

Alternatively, the comparator 32 may be provided for the data processingunit 4. In this case, the comparator 32 may be of a type which directlysenses the output voltage (analog signal) of the main battery 18.Furthermore, in this case, the output voltage of the external powersupply 8 is not necessarily used as a reference voltage.

The present invention is not limited to the above embodiments. It willbe obvious to those skilled in the art that the invention may bepracticed or embodied in still other ways without departing from thespirit or essential character thereof. For instance, by using the outputof the comparator 32 to drive acoustic and/or optical and/or visualalarm means such as a buzzer or a lamp, in addition to the display 36,it is possible to let the operator know a drop in the output voltage ofthe main battery 18.

The data processing medium 2 to which the present invention is to beapplied contains various types of IC (integrated circuit) cards on whichsemiconductor storage elements requiring constant voltage supply forretaining data are provided, in addition to a memory card.

As has been explained, according to the data processing medium of theinvention and its backup circuit and the data processing system of theinvention, because the second backup means is charged by the firstbackup means, it is not necessary to charge the second backup meansbefore replacement of the first backup means, thereby reducing thenumber of charges and discharges of the second backup means. Because acharging current does not flow from the external power supply to thesecond backup means, the second backup means may be one with lowwithstand voltage characteristics and consequently be an inexpensiveone. Furthermore, the configuration of the backup circuit is simple.

What is claimed is:
 1. A data processing medium containing asemiconductor element which can at least store data, comprising:avoltage input terminal which can be connected to an external powersupply and from which a voltage supply line is extended to supply avoltage from the external power supply so as to operate thesemiconductor element; first detachable backup means which has positiveand a negative electrode, the positive electrode being operativelycoupled to the semiconductor element via the voltage supply line, andwhich backs up the stored data in the semiconductor element during thetime when the external power supply is disconnected from the voltageinput terminal; second backup means which has a positive and a negativeelectrode, the positive electrode being electrically connected to thepositive electrode of the first backup means so as to be charged fromthe first backup means, and which backs up the stored data in thesemiconductor element during the time when the external power supply isdisconnected from the voltage input terminal and the first backup meansis detached; and charging prevention means provided between the junctionof the positive electrode of the first backup means and the positiveelectrode of the second backup means and the external power supply sothat the second backup means may not be charged from the external powersupply.
 2. The data processing medium according to claim 1, wherein saiddata processing medium is an integrated circuit card.
 3. The dataprocessing medium according to claim 1 or 2, wherein said dataprocessing medium is a memory card.
 4. The data processing mediumaccording to claim 1, wherein said semiconductor element is a staticrandom access memory.
 5. The data processing medium according to claim1, wherein said second backup means is a capacitor.
 6. The dataprocessing medium according to claim 1, wherein said second backup meansis a rechargeable battery.
 7. A backup circuit for backing up storeddata in a semiconductor element in a data processing medium comprising asemiconductor element which can at least store data and a voltage inputterminal which can be connected to an external power supply and fromwhich a voltage supply line is extended to supply a voltage from theexternal power supply so as to operate the semiconductor element, saidbackup circuit comprising:first backup means which is detachable fromthe data processing medium, has a positive and a negative electrode, thepositive electrode being electrically connected to the semiconductorelement via the voltage supply line, and which backs up the stored datain the semiconductor element during the time when the external powersupply is disconnected from the voltage input terminal; second backupmeans which is detachable from the data processing medium, has apositive and a negative electrode, the positive electrode beingelectrically connected to the positive electrode of the first backupmeans so as to be charged from the first backup means, and which backsup the stored data in the semiconductor element during the time when theexternal power supply is disconnected from the voltage input terminaland the first backup means is detached from the data processing medium;and charging prevention means provided between the junction of thepositive electrode of the first backup means and the positive electrodeof the second backup means and the external power supply so that thesecond backup means may not be charged from the external power supply.8. The backup circuit according to claim 7, wherein the positiveelectrode of said first and the positive electrode of said second backupmeans are connected in parallel directly.
 9. The backup circuitaccording to claim 7, wherein the positive electrode of said firstbackup means and the positive electrode are connected in parallel via aresistance.
 10. The backup circuit according to any one of claims 7 to9, wherein said second backup means is a capacitor.
 11. The backupcircuit according to any one of claims 7 to 9, wherein said secondbackup means is a rechargeable battery.
 12. The backup circuit accordingto claim 7, wherein said charging prevention means is a diode providedin a forward direction running from the positive electrode of the firstbackup means toward said power supply line.
 13. A data processing systemcomprising a data processing medium containing a semiconductor elementwhich can at least store data and a data processing unit to which thedata processing medium is to be connected, data exchange being effectedbetween the data processing medium and the data processing unit, whereinsaid data processing unit comprises:a power supply for supplying avoltage; and transmission/reception means for transmitting and/orreceiving data to and from said semiconductor element of said dataprocessing medium; and said data processing medium comprises: a voltageinput terminal which can be connected to said power supply of said dataprocessing unit and from which a voltage supply line is extended tosupply a voltage from said power supply so as to operate saidsemiconductor element; first detachable backup means which has apositive and a negative electrode, the positive electrode beingconnected to said semiconductor element via the voltage supply line, andwhich backs up the stored data in said semiconductor element during thetime when said power supply is disconnected from the voltage inputterminal; second backup means which has a positive and a negativeelectrode, the positive electrode being electrically connected inparallel to the positive electrode of the first backup means so as to becharged from the first backup means, and which backs up the stored datain said semiconductor element during the time when said power supply isdisconnected from the voltage input terminal and the first backup meansis detached; and charging prevention means provided between the junctionof the positive electrode of the first backup means and the positiveelectrode of the second backup means and the voltage input terminal sothat the second backup means may not be charged from said power supply.14. The data processing system according to claim 13, further comprisingconnection means for connecting said data processing medium and saiddata processing unit so that data may be transmitted and/or receivedbetween said semiconductor element of said data processing medium andsaid transmission/reception means of said data processing unit.
 15. Thedata processing system according to claim 13 or 14, wherein sadconnection means is a connector which is installed in said dataprocessing unit and into which said data processing medium can beinstalled.
 16. The data processing system according to any one of claims13 to 14, further comprising means for letting the operator know theconsumption of the first backup means of said data processing medium.17. The data processing system according to claim 13, wherein said dataprocessing medium is an integrated circuit card.
 18. The data processingsystem according to claim 13, wherein said data processing medium is amemory card.
 19. The data processing system according to claim 13,wherein said data processing unit is a computer and/or its peripheralequipment.